Eye diagram estimation including crosstalk effect for high-speed channel on PCB, silicon and glass interposer인쇄 회로 기판, 실리콘과 유리 인터포저의 고속 채널을 위한 누화 효과 포함 아이 다이어그램 예측

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Recently, data rate of high-speed channel especially for GDDR is getting increase over 10 Gbps/pin. To have wide bandwidth, number of I/O increases and metal space is going to be very narrow. Hence, cross-talk issue has become more important. On high-speed channel, input signals are degraded by many reasons such as crosstalk effect, channel loss, and ISI. These factors limit the data rate of the channel. Even differen-tial signaling, which has strong external noise immunity, is affected by crosstalk effect because of narrow metal space. Therefore, signal integrity analysis for high-speed channel is required. Eye diagram is easy to check the signal integrity of high-speed channel that is a convenient graphical metrics to analyze received signals at receiver. As data rate increases, deterministic jitter became the dominant jitter component which is considered in worst eye diagram. Previous researches for worst eye diagram estimation have limitations for high-speed channel. In this thesis, precise and fast eye diagram estimation method is proposed. Proposed eye diagram esti-mation method is able to consider crosstalk effect and be used for two and three channels system. This pro-posed method can be applied for single-ended and differential signaling channels on various substrates such as PCB, silicon and glass interposer. Eye diagrams of silicon and glass interposer channels with same dimension are compared. In addition, using this proposed method, eye diagrams of crosstalk reduction schemes, wide space and wide space with guard trace, are estimated and analyzed.
Advisors
Kim, Joung-Horesearcher김정호
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
2014
Identifier
569294/325007  / 020123720
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 2014.2, [ v, 40 p. ]

Keywords

Eye Diagram Estimation; 차동 전송 선로; 단일 전송 선로; 워스트 입력 신호; 유리 인터포저; 실리콘 인터포저; Crosstalk; High-speed Channl; PCB; Silicon Interposer; Glass Interposer; Worst Input Cases; Single-ended Channel; Differential Channel; 아이 다이어그램 예측; 누화효과; 고속 채널; 인쇄 회로 기판

URI
http://hdl.handle.net/10203/196618
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=569294&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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