A highly efficient CMOS linear power amplifier (PA) for IEEE WLAN 802.11 b/g/n/ac application is presented. To achieve high linear output power and high efficiency, a large signal MGTR linearization method is proposed with a modified envelope injection common source gate bias circuit. A novel inter-stage matching transformer which functions as a power splitter is designed to implement this method. Moreover, to enhance linearity in CMOS power amplifier, adaptive power cell(APC) linearization method is proposed. Also, we proposed integrated bias circuits with reduced sensitivity to voltages. With proposed linearization schemes, we improved PA performances in terms of EVM, $IMD_3$, AM to PM, AM to AM and ACLR.
Furthermore, a fully integrated WLAN/WPAN multi-mode front-end module(FEM) scheme is proposed. The FEM contains dual mode CMOS PA for WLAN and Blue-tooth/Wi-Fi direct and shared low noise amplifier(LNA). The proposed FEM includes integrated switches for mode change. The proposed scheme can reduce the chip size of FEM significantly with minimizing its performance degradation.