Noise coupling analysis and reduction in 3D-IC considering through-silicon via (TSV) nonlinearity3차원 집적회로에서 TSV의 비선형성을 고려한 노이즈 커플링 분석 및 감소에 관한 연구

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To satisfy the increasing demands of high chip-area density with low cost, three-dimensional integrated circuit (3D-IC) is emerging as the solution, where several chips are vertically stacked. To maximize the advantages of 3D-IC, stacked silicon chips should be connected using through-silicon via (TSV), which is the shortest interconnection between stacked chips compared with other interconnections like wire-bonding. TSV is manufactured by penetrating the silicon substrate and filling the hole with conductive material. Because of the insulation layer between the conductive material and silicon substrate, TSV constructs metal-insulator-semiconductor (MIS) structure; it generates depletion region depending on the TSV bias voltage. Even though TSV dc bias voltage is fixed, TSV signal itself changes TSV voltage and corresponding voltage-dependent capacitance. Especially for the TSV large signal, it shows nonlinear effects such as harmonic generations and frequency mixing both at the transmitted signal and coupling noise. In the respect of TSV noise coupling, it is expected to be a major problem in 3D-IC because of the highly dense TSV I/O distribution with high-frequency signaling to achieve high bandwidth. Furthermore, conductive silicon substrate becomes critical noise coupling path for TSV. For reliable 3D-IC system, precise estimation of noise coupling and management of nose-tolerance budget is very significant. In this dissertation, a TSV noise coupling model is proposed by combining a TSV equivalent circuit model and a substrate unit cell model, based on a 3-dimensional transmission line matrix method (3D-TLM) considering TSV nonlinear effects; it is first demonstrated and analyzed. Using the proposed TSV noise coupling model, the TSV noise transfer functions can be precisely estimated in complicated 3-dimensional structures, including TSVs, active circuits, and shielding structures such as shielding TSVs, shielding bumps, and guard rings. To validate the pr...
Advisors
Kim, Joung-Horesearcher김정호
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
2013
Identifier
586450/325007  / 020105182
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학과, 2013.2, [ viii, 71 p. ]

Keywords

노이즈 커플링; 실리콘 관통비아; 비선형성; 공핍층; 실딩; through-silicon via (TSV); noise coupling; shielding; nonlinearity; depletion

URI
http://hdl.handle.net/10203/196575
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=586450&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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