A hybrid baseband chain for Long-Term Evolution (LTE) was implemented in a TSMC 65-nm CMOS process. It has an active area of 0.75 mm(2) and a power consumption of 10.8 mW at a supply of 1.8 V. The proposed baseband chain consists of a continuous-time (CT) lowpass filter and a charge-domain discrete-time (DT) filter with a variable gain amplifier (VGA) and a DC-offset canceller (DCOC). The passband distortion of the DT filter is calibrated by varying the quality (Q)-factor of the CT filter, which is easily tuned by switched-resistors. The charge-domain DT filter is adopted for anti-aliasing filtering and efficient interferer rejection with small size and low power consumption. By combining the CT and the DT filters, the baseband chain acquires improved passband flatness with an in-band ripple of less than 1 dB from 0.7 MHz to 10 MHz. It also has a gain of 50.8 dB, input-referred noise of 22.8 nV/root Hz and an out-of-band IIP3 of 29 dBm.