Advanced addition-only digital error correction 기법을 포함하는 0.5μm CMOS 2.3V 1.2mW 12b 3MS/s SAR ADC의 설계A 2.3V 1.2mW 12b 3MS/s SAR ADC with advanced addition-only digital error correction in 0.5μm CMOS

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Advisors
류승탁researcherRyu, Seung-Tak
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
2012
Identifier
486800/325007  / 020103297
Language
kor
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 2012.2, [ vi, 55 p. ]

Keywords

A2ADEC); Advanced addition-only digital error correction (Advanced ADEC; Successive Approximation Register ADC; SAR ADC; digital error correction; SAR ADC; Successive Approximation Register ADC; Advanced addition-only digital error correction (Advanced ADEC; A2ADEC); digital error correction; multistep binary error correction; multistep binary error correction

URI
http://hdl.handle.net/10203/180874
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=486800&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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