Engineering of source/drain junctions in MOSFETs and its application to memory cellsMOSFET의 소스/드레인 전극의 엔지니어링 및 메모리 셀로의 응용
- Advisors
- Choi, Yang-Kyuresearcher; 최양규
- Description
- 한국과학기술원 : 전기 및 전자공학과,
- Publisher
- 한국과학기술원
- Issue Date
- 2012
- Identifier
- 486683/325007 / 020085339
- Language
- eng
- Description
학위논문(박사) - 한국과학기술원 : 전기 및 전자공학과, 2012.2, [ vi, 135 p. ]
- Keywords
engineering; Source and drain; MOSFET; Flash memory; NAND; junctionless; Schottky-barrier; dopant-segregation; FinFET; SONOS
- Appears in Collection
- EE-Theses_Ph.D.(박사논문)
- Files in This Item
- There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.