Automatic interface insertion for hardware emulation of algorithm models

Abstract

As the silicon technology readily affords to embed large-scaled design in a single chip, verification of the chip designed becomes more critical. Since most chips construct a system together with other hardware components and cooper-ate with the hardware components, validation incorporating with the external hardware at the earlier stage of the design is the key to reduce the turn around time. To validate a design at the early stage, the algorithm model of the chip de-scribed at high level must be able to be co-emulated with real target hardware components. In this thesis, an automatic interface insertion scheme for hardware emulation of algorithm models is proposed using the source-to-source translation mechanism. Interface between algorithm models and hardware is based on transaction-level so that emulation speed can keep up with real-time requirement that may be required in some applications. For the automation of interface insertion, we introduce I/O terminal model as interface model in the software where accesses to I/O terminals are linked to bus cycle transactions in hard-ware. Based on the I/O terminal model, we devised an automation tool that allows software modules described in C language to communicate with designated hardware through specified interfacing protocol. Code analysis techniques are used to identify I/O terminals and efficiently insert interface function calls in the source C code. As an example of the real-world applications, which can be facilitated by real-time and in-system verification, we applied the scheme to two multimedia application: MP3 audio decoding and MPEG2 video decoding. An MP3 decoding algorithm written in C was used as the algorithm model while a commercial MP3 decoding chip, MAS3507, was used as interface specification of the chip to be emulated. The algorithm model is successfully executed in real time on a commercial MP3 player board. An artificial MPEG2 video decoder chip with flash memory interface, SRAM interface...