DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cho, Byung Jin | - |
dc.contributor.author | Park, CS | - |
dc.contributor.author | Lwin, PW | - |
dc.contributor.author | Wong, SY | - |
dc.contributor.author | Pu, J | - |
dc.contributor.author | Hwang, WS | - |
dc.date.accessioned | 2013-03-18T05:16:32Z | - |
dc.date.available | 2013-03-18T05:16:32Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2005-07-03 | - |
dc.identifier.citation | 3rd International Conference on Materials for Advanced Technologies, v., no., pp.41 - 41 | - |
dc.identifier.uri | http://hdl.handle.net/10203/145070 | - |
dc.language | ENG | - |
dc.title | Dual metal gate process scheme for wide range work function modulation and reduced Fermi level pinning | - |
dc.title.alternative | Dual metal gate process scheme for wide range work function modulation and reduced Fermi level pinning | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | 41 | - |
dc.citation.endingpage | 41 | - |
dc.citation.publicationname | 3rd International Conference on Materials for Advanced Technologies | - |
dc.identifier.conferencecountry | Singapore | - |
dc.identifier.conferencecountry | Singapore | - |
dc.contributor.localauthor | Cho, Byung Jin | - |
dc.contributor.nonIdAuthor | Park, CS | - |
dc.contributor.nonIdAuthor | Lwin, PW | - |
dc.contributor.nonIdAuthor | Wong, SY | - |
dc.contributor.nonIdAuthor | Pu, J | - |
dc.contributor.nonIdAuthor | Hwang, WS | - |
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