DSpace at KOASAS: A Delay Line Circuit Design For Crosstalk Minimization Using Genetic Algorithm

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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

A Delay Line Circuit Design For Crosstalk Minimization Using Genetic Algorithm

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Kim, Joungho researcher / Chung, Chaeho / Lee, Soobum / Kwak, Byungman / Kim, Gawon

Issue Date: 2006

Language: ENG

Citation: China-Japan-Korea Joint Symposium on Optimization of Structural and Mechanical Systems, pp.551 - 556

URI: http://hdl.handle.net/10203/141410

Appears in Collection: EE-Conference Papers(학술회의논문)

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