Showing results 1 to 8 of 8
Fast Location of Opens in TSV-Based 3-D Chip Using Simple Resistor Chain Hu, Sanming; Jin, Cheng; Li, Hongyu; Li, Rui; Chong, Ser Choong; Jong, Ming Chinq; Wai, Eva Leong Ching; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.61, no.7, pp.2584 - 2587, 2014-07 |
High-Frequency Scalable Electrical Model and Analysis of a Through Silicon Via (TSV) Kim, Joo-Hee; Pak, Jun-So; Cho, Jong-Hyun; Song, Eak-Hwan; Cho, Jeong-Hyeon; Kim, Hee-Gon; Song, Tai-Gon; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.1, no.2, pp.181 - 195, 2011-02 |
Localization of Short and Open Defects in Multilayer Through Silicon Vias (TSV) Daisy-Chain Structures Piersanti, Stefano; de Paulis, Francesco; Olivieri, Carlo; Jung, Daniel Hyunsuk; Kim, Joungho; Orlandi, Antonio, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.59, no.5, pp.1558 - 1564, 2017-10 |
Modeling and Analysis of TSV Noise Coupling Effects on RF LC-VCO and Shielding Structures in 3D IC Lim, Jaemin; Cho, Jonghyun; Jung, Daniel Hyunsuk; Kim, Jonghoon J.; Choi, Sumin; Kim, Dong-Hyun; Lee, Man Ho; et al, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.60, no.6, pp.1939 - 1947, 2018-12 |
The Effect of Double-Layer Nonconductive Films on the Solder Sidewall Wetting and the Reliability of 40-mu m Cu-Pillar/SnAg Microbumps for Chip-on-Chip Interconnection Lee, Seyong; Lee, Hanmin; Shin, SangMyung; Jang, MinGu; Choi, TaeJin; Paik, Kyung-Wook, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.9, no.6, pp.1167 - 1175, 2019-06 |
Thermal and Signal Integrity Co-Design and Verification of Embedded Cooling Structure With Thermal Transmission Line for High Bandwidth Memory Module Son, Keeyoung; Kim, Seongguk; Park, Hyunwook; Shin, Taein; Kim, Keunwoo; Kim, Minsu; Sim, Boogyo; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.12, no.9, pp.1542 - 1556, 2022-09 |
Through Silicon Via (TSV) Defect Modeling, Measurement, and Analysis Jung, Daniel Hyunsuk; Kim, Youngwoo; Kim, Jonghoon J.; Kim, Heegon; Choi, Sumin; Song, Yoon-Ho; Bae, Hyun-Cheol; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.7, no.1, pp.138 - 152, 2017-01 |
Wafer-Level Double-Layer Nonconductive Films for Flip-Chip Assembly Lee, Seyong; Lee, HanMin; Shin, Ji Won; Kim, Woojeong; Choi, Taejin; Paik, Kyung-Wook, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.7, no.8, pp.1258 - 1264, 2017-08 |
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