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Multi-Mode QC-LDPC Decoding Architecture With Novel Memory Access Scheduling for 5G New-Radio Standard Lee, Seongjin; Park, Sangsoo; Jang, Boseon; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.69, no.5, pp.2035 - 2048, 2022-05 |
VLSI implementation of neural network with on-chip learning capability = 학습능력을 가지는 신경회로망의 VLSI 구현link Choi, Yoon-Kyung; 최윤경; et al, 한국과학기술원, 1996 |
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