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A low-power charge-recycling ROM architecture Yang, BD; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.11, pp.590 - 600, 2003-08 |
A low-power ROM using single charge-sharing capacitor and hierarchical bit line Yang, BD; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.14, pp.313 - 322, 2006-04 |
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