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A 21-Gbit/s 1.63-pJ/bit Adaptive CTLE and One-Tap DFE With Single Loop Spectrum Balancing Method Kim, Yong-Hun; Kim, Young-Ju; Lee, Taeho; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.2, pp.789 - 793, 2016-02 |
개선된 안전계수 접근법을 이용한 신뢰성 기반 최적설계 = Enhanced safety factor approach for reliability-based design optimizationlink 이광원; Lee, Gwangwon; et al, 한국과학기술원, 2016 |
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