Scheduling algorithms for a semiconductor probing facility

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This paper focuses on a scheduling problem in a semiconductor wafer probing facility. In the probing facility, wafer lots with distinct ready times are processed on a series of workstations, each with identical parallel machines. We develop a heuristic algorithm for the problem with the objective of minimizing total tardiness of orders. The algorithm employs a bottleneck-focused scheduling method, in which a schedule at the bottleneck workstation is constructed first and then schedules for other workstations are constructed based on the schedule at the bottleneck. For scheduling wafer lots at the bottleneck workstation, we consider prospective tardiness of the lots as well as sequence-dependent setup times required between different types of wafer lots. We also present a rolling horizon method for implementation of the scheduling method on a dynamic situation. The suggested methods are evaluated through a series of computational experiments and results show that the methods work better than existing heuristic methods. (C) 2010 Elsevier Ltd. All rights reserved.
Publisher
PERGAMON-ELSEVIER SCIENCE LTD
Issue Date
2011-03
Language
English
Article Type
Article
Keywords

SEQUENCE-DEPENDENT SETUP; UNRELATED PARALLEL MACHINES; WAFER FABRICATION FACILITY; PRECEDENCE CONSTRAINTS; LAGRANGIAN-RELAXATION; GENETIC ALGORITHM; BACKWARD APPROACH; IC SORT; TIMES; JOBS

Citation

COMPUTERS & OPERATIONS RESEARCH, v.38, no.3, pp.666 - 673

ISSN
0305-0548
DOI
10.1016/j.cor.2010.08.010
URI
http://hdl.handle.net/10203/98733
Appears in Collection
IE-Journal Papers(저널논문)
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