DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Yeong-Dae | ko |
dc.contributor.author | Kang, Jae-Hun | ko |
dc.contributor.author | Lee, Gyeong-Eun | ko |
dc.contributor.author | Lim, Seung-Kil | ko |
dc.date.accessioned | 2013-03-11T08:04:39Z | - |
dc.date.available | 2013-03-11T08:04:39Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2011-02 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.24, no.1, pp.14 - 26 | - |
dc.identifier.issn | 0894-6507 | - |
dc.identifier.uri | http://hdl.handle.net/10203/98725 | - |
dc.description.abstract | In this paper, we consider a scheduling problem in a semiconductor test facility. We focus on the burn-in workstation and its corresponding loading/unloading workstation, which may be considered bottleneck workstations in the test facility. In the burn-in workstation, there are parallel identical batch-processing machines, called chambers, while there are unrelated parallel machines in the loading/unloading workstation. We present heuristic algorithms for the scheduling problem at the burn-in workstation as well as the loading/unloading workstation with the objective of minimizing total tardiness of orders. For evaluation of performance of the algorithms, a series of computational experiments are performed on a number of problem instances, and results show that the suggested heuristic algorithms outperform existing scheduling rules that are currently used in a real system. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | INCOMPATIBLE JOB FAMILIES | - |
dc.subject | BATCH PROCESSING MACHINE | - |
dc.subject | WAFER FABRICATION FACILITY | - |
dc.subject | 2-MACHINE REENTRANT FLOWSHOP | - |
dc.subject | TOTAL WEIGHTED TARDINESS | - |
dc.subject | HYBRID FLOWSHOP | - |
dc.subject | DISPATCHING RULES | - |
dc.subject | BOUND ALGORITHM | - |
dc.subject | COMPLETION-TIME | - |
dc.subject | OPERATIONS | - |
dc.title | Scheduling Algorithms for Minimizing Tardiness of Orders at the Burn-in Workstation in a Semiconductor Manufacturing System | - |
dc.type | Article | - |
dc.identifier.wosid | 000287085900003 | - |
dc.identifier.scopusid | 2-s2.0-79951562136 | - |
dc.type.rims | ART | - |
dc.citation.volume | 24 | - |
dc.citation.issue | 1 | - |
dc.citation.beginningpage | 14 | - |
dc.citation.endingpage | 26 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING | - |
dc.identifier.doi | 10.1109/TSM.2010.2082470 | - |
dc.contributor.localauthor | Kim, Yeong-Dae | - |
dc.contributor.nonIdAuthor | Kang, Jae-Hun | - |
dc.contributor.nonIdAuthor | Lee, Gyeong-Eun | - |
dc.contributor.nonIdAuthor | Lim, Seung-Kil | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Burn-in | - |
dc.subject.keywordAuthor | heuristics | - |
dc.subject.keywordAuthor | scheduling | - |
dc.subject.keywordAuthor | semiconductor manufacturing | - |
dc.subject.keywordPlus | INCOMPATIBLE JOB FAMILIES | - |
dc.subject.keywordPlus | BATCH PROCESSING MACHINE | - |
dc.subject.keywordPlus | WAFER FABRICATION FACILITY | - |
dc.subject.keywordPlus | 2-MACHINE REENTRANT FLOWSHOP | - |
dc.subject.keywordPlus | TOTAL WEIGHTED TARDINESS | - |
dc.subject.keywordPlus | HYBRID FLOWSHOP | - |
dc.subject.keywordPlus | DISPATCHING RULES | - |
dc.subject.keywordPlus | BOUND ALGORITHM | - |
dc.subject.keywordPlus | COMPLETION-TIME | - |
dc.subject.keywordPlus | OPERATIONS | - |
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