Sample measurement inspecting for a process parameter is a necessity in semiconductor manufacturing because of the prohibitive amount of time involved in 100% inspection while maintaining sensitivity to all types of defects and abnormality. In current industrial practice, sample measurement locations are chosen approximately evenly across the wafer, in order to have all regions of the wafer equally well represented, but they are not adequate if process-related defective chips are distributed with spatial pattern within the wafer. In this paper, we propose the methodology for generating effective measurement sampling plan for process parameter by applying the Self-Organizing Feature Map (SOFM) network, unsupervised learning neural network, to wafer bin map data within a certain time period. The sampling plan specifies which chips within the wafer need to be inspected, and how many chips within the wafer need to be inspected for a good sensitivity of 100% wafer coverage and defect detection. We finally illustrate the effectiveness of our proposed sampling plan using actual semiconductor fab data. (C) 2001 Elsevier Science Ltd. All rights reserved.