Search heuristics for a flowshop scheduling problem in a printed circuit board assembly process

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dc.contributor.authorKim, Yeong-Daeko
dc.contributor.authorLim, HGko
dc.contributor.authorPark, MWko
dc.date.accessioned2008-10-07T08:58:35Z-
dc.date.available2008-10-07T08:58:35Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1996-05-
dc.identifier.citationEUROPEAN JOURNAL OF OPERATIONAL RESEARCH, v.91, no.1, pp.124 - 143-
dc.identifier.issn0377-2217-
dc.identifier.urihttp://hdl.handle.net/10203/7524-
dc.description.abstractWe consider a scheduling problem in a factory producing printed circuit boards (PCBs). The PCB assembly process in this factory can be regarded as a flowshop which has two special characteristics: jobs have sequence dependent setup times and each job consists of a lot (batch) of identical PCBs. Because of the latter characteristic, it is possible to start a job on a following machine before the job is entirely completed on a previous machine, that is, there is time-lag between machines. In this paper, we propose several heuristics, including taboo search (TS) and simulated annealing (SA) methods, for this generalized flowshop scheduling problem with the objective of minimizing mean tardiness. We compare suggested heuristics after series of tests to find appropriate values for parameters needed for the two search algorithms, TS and SA. Results of computational tests on randomly generated test problems are reported.-
dc.description.sponsorshipThis research is supported by the Korean Science and Engineering Foundation (KOSEF) under grant 941-1000-015-1.en
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherELSEVIER SCIENCE BV-
dc.subjectMINIMIZING MEAN TARDINESS-
dc.subjectSHOP SEQUENCING PROBLEM-
dc.subjectDEPENDENT SETUP TIMES-
dc.subjectTABU SEARCH-
dc.subjectN-JOB-
dc.subjectMILP MODEL-
dc.subjectM-MACHINE-
dc.subject2-MACHINE-
dc.subjectALGORITHM-
dc.subjectOPTIMIZATION-
dc.titleSearch heuristics for a flowshop scheduling problem in a printed circuit board assembly process-
dc.typeArticle-
dc.identifier.wosidA1996UP57900010-
dc.identifier.scopusid2-s2.0-0000814799-
dc.type.rimsART-
dc.citation.volume91-
dc.citation.issue1-
dc.citation.beginningpage124-
dc.citation.endingpage143-
dc.citation.publicationnameEUROPEAN JOURNAL OF OPERATIONAL RESEARCH-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorKim, Yeong-Dae-
dc.contributor.nonIdAuthorLim, HG-
dc.contributor.nonIdAuthorPark, MW-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorscheduling-
dc.subject.keywordAuthorheuristics-
dc.subject.keywordAuthortaboo search-
dc.subject.keywordAuthorsimulated annealing-
dc.subject.keywordAuthorPCB assembly-
dc.subject.keywordPlusMINIMIZING MEAN TARDINESS-
dc.subject.keywordPlusSHOP SEQUENCING PROBLEM-
dc.subject.keywordPlusDEPENDENT SETUP TIMES-
dc.subject.keywordPlusTABU SEARCH-
dc.subject.keywordPlusN-JOB-
dc.subject.keywordPlusMILP MODEL-
dc.subject.keywordPlusM-MACHINE-
dc.subject.keywordPlus2-MACHINE-
dc.subject.keywordPlusALGORITHM-
dc.subject.keywordPlusOPTIMIZATION-
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