A reconfigurable RF front-end using tunable interstage matching for 1.8~2.4 GHz frequency band1.8~2.4 GHz 대역을 위한 조절 가능한 interstage matching을 이용한 재구성 가능한 RF front-end
A reconfigurable RF front-end using a tunable interstage matching network is designed in 0.25 $\mum$ CMOS technology. It consists of a wideband LNA, interstage matching network, a Gilbert-cell mixer, and reconfigurable QVCO. Tunability of the interstage matching can be obtained by a MOS varactor. It can change tuning frequency by controlling capacitance of varactor. Gain of the RF front-end can be flattened over whole target band by the proposed interstage matching form 1.8 to 2.4 GHz. It can also reduce chip-size and noise for added inductor.
The reconfigurable QVCO composed of L and switched C tank has wide tuning range from 1.76 to 2.6 GHz and low phase noise less than -120 dBc/Hz at 1MHz offset from the carrier frequency. The proposed QVCO can generate quadrature signals by superharmonic coupling with inductors. It can reduce phase noise by substituting current source into decoupling inductors. Low phase noise characteristic is also achieved by optimizations of many noise sources in the QVCO.
Designed RF front-end has homogeneous performance from 1.8 to 2.4 GHz. It can be used for 3G wireless communications, mobile internet, and WLAN applications such as IEEE 802.11b/g.