Emulation with the microprogrammable microprocessor마이크로프로그래머블 마이크로프로세서를 이용한 에뮬레이션

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 358
  • Download : 0
The high speed bipolar microprocessors having bit sliced architecture and microprogrammability have become available as the standard building blocks for high performance applications such as the CPU of general purpose computers and high speed controllers. Among these bipolar micro-processors, the Intel Series 3000 Bipolar Microcomputer Set was chosen after careful comparisons, and microprogrammed to interpret the instruction set of the PACE, National Semiconductor Corp.``s 16 bit microprocessor which has farely powerful instruction set and architecture but is rather slow due to the speed limitation of the PMOS technology. For this purpose, the microprogram was written and assembled into the microprogram ROM image using the micro-assembler, and then simulated and debugged by the simulator on the NOVA 840, which is an indispensable step prior to hardware realization. As a result, more than 5.3 times faster speed was achieved with comparable cost, and in addition custom instruction MUL was tailored to multiply two 16 bit numbers using the Booth``s alogorithm in 25 usec which is about 40 times faster than the original PACE.
Advisors
Park, C.H.박철현
Description
한국과학기술원 : 전기 및 전자공학과,
Publisher
한국과학기술원
Issue Date
1977
Identifier
62153/325007 / 000751068
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1977.2, [ vi, 53, [13] p. ]

URI
http://hdl.handle.net/10203/39441
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=62153&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0