Vertical FET fabrication for optoelectronic integrated circuit = 광전 집적 회로를 위한 수직형 전계 효과 트랜지스터의 제작

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The vertical GaAs FET (Field Effect Transisto) with a 3 $\mu{m}$ grating period was fabricated using two different epitaxy system, LPE and MOCVD. The VFET was designed to be used as a driving transistor for vertical OEIC (Optolelectronic Integrated Circuit) applications. Several simulations were performed to comprehend the mechanisms of VFET with KADES-II. The tungsten was used as the gate metal and the selective epitaxy method was used in fabrication. The device properties only using LPE system were not sufficient to drive the laser diode. However, The VFET by MOCVD had good D.C. characteristics and was operated in depletion mode. A maximum transconductance of 22mS/mm was achieved in the devices doped at $1\times10^{16}cm^{-3}$ The Schottky contacts between the overgrown layer and the tungsten gate sustained stable characteristics. The PBT (Permeable Base Transistor) or the SIT(Static Induction Transistor) can be fabricated by using the process sequences in this experiments.
Advisors
Kwon, Young-Seresearcher권영세researcher
Description
한국과학기술원 : 전기 및 전자공학과,
Publisher
한국과학기술원
Issue Date
1990
Identifier
67318/325007 / 000881110
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1990.2, [ ii, 51 p. ]

URI
http://hdl.handle.net/10203/39107
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=67318&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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