(A) study on graphene synthesis for future carbon-based IC technology미래 탄소 기반 소자 기술을 위한 그래핀 합성 연구

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Since 2004 when Graphene was first demonstrated to exist in nature as stable 2D structure, many researchers both in academic and industrial society have surged in demonstrating graphene’s unique excellent electrical properties, devising large-area graphene synthesis and showing possibilities of graphene as being used in various applications as well. Especially the biggest obstacle is how to grow large area graphene synthesis. Several graphene synthesis methods have been reported : (1) Mechanically exfoliation method, (2) Thermal decomposition of SiC in a vacuum, (3) CVD graphene synthesis on a catalytic metal, and (4) Chemical method by graphite oxide. In this work, Graphene synthesis was carried out by thermal decomposition of SiC in a vacuum and CVD graphene synthesis on metal respectively. When SiC wafer is annealed at high temperature in high vacuum, graphene layers are formed on the surface of SiC. However it has a lot of carbon dumps and wrinkles on the surface of graphene, which needs to be removed for high quality graphene. Thus, silane surface pre-treatment which is compatible to silicon process was introduced here to remove those kinds of carbon things by helping native oxide remove uniformly on the surface of SiC during the graphitization. Recently, CVD graphene synthesis on Ni has gained lots of attentions due to its advantages to other methods such as large area graphene synthesis, its easiness of layer transfer onto other arbitrary substrate and relatively cheap material price. But it has one limit with non-uniform graphene on Ni from monolayer to even 10 layers of graphene. To resolve that problem, the origin of non-uniform graphene formation on metal was suggested and validated by using Pt as a replacement of Ni for catalytic metal and comparing its results with Ni. With Pt, uniform graphene layer was obtained over the entire surface of metal and $SiO_2/Si$ after layer transfer. Suggested techniques were demonstrated to improve th...
Advisors
Cho, Byung-Jinresearcher조병진researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2009
Identifier
327326/325007  / 020074096
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2009. 8., [ xii, 66 p. ]

Keywords

Graphene; Silane treatment; SiC; CVD Graphene growth; Platinum; 그래핀; 사일렌 처리; 실리콘 카바이드; CVD 그래핀 성장; 플래티늄; Graphene; Silane treatment; SiC; CVD Graphene growth; Platinum; 그래핀; 사일렌 처리; 실리콘 카바이드; CVD 그래핀 성장; 플래티늄

URI
http://hdl.handle.net/10203/38776
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=327326&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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