(A) high-speed CMOS Sigma-Delta D/A converter고속 CMOS Sigma-Delta D/A 변환기

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 370
  • Download : 0
As modern integrated-circuit technology provides compact and efficient implementation of digital signal processing algorithms, many functions that had traditionally been realized in analog form are now performed in the digital domain. With increasing popularity of digital signal processing, high-quality interfaces between the analog and digital world are gaining more importance. Modern applications require higher-speed and higher-resolution data converters. This thesis is concerned with a high-speed and high-resolution digital-to-analog converter(DAC). To get a high conversion rate maintaining a high resolution, a 4th-order Σ-Δ modulator with a relatively low oversampling ratio was used. For stability, a mulit-bit quantizer was employed. The mulit-bit output of the modulator was converted to analog pulses using a current-mode DAC. The linearity of the current-mode DAC was achieved by adopting self-calibration method. To minimize the harmonic distortion, superposition of two RZ pulses was used. The D/A converter was designed and simulated using Anam 0.25㎛ CMOS technology. The maximum input signal bandwidth was 6MHz. The circuit was designed to operate at 2.5V single power supply. It achieved a spurious free dynamic range of 100dB and peak SNDR of 98dB.
Advisors
Lee, Yong-Hoonresearcher이용훈researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2000
Identifier
157453/325007 / 000983310
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2000.2, [ v, 51 p. ]

Keywords

DAC; Sigma-Delta; 시그마-델타; 데이타 변환기

URI
http://hdl.handle.net/10203/37294
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=157453&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0