Customization of embedded system for low-power application = 저전력 어플리케이션을 위한 임베디드 시스템의 최적화

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Marvelous advance of VLSI technology made it possible to integrate a complex system like PC on a single chip. While the system-on-chip (SoC) technology promise a dramatic enhancement in system performance, it also invokes a side effect of huge power consumption of a single chip. On the contrary, most embedded system applications and their chip implementation constantly pursue the lowest power consumption, because the chip cost is sensitive to it and excessive power consumption may cause reliability problem. In this thesis, we try to reduce the power consumption of SoC through divide and conquer approach. We identify the blocks of high power consumption, and propose methodology and techniques to reduce their power consumption. The target blocks for power optimization include embedded processor, memory and external I/O. First, we develop a core-customization process of a CISC processor core for a given application program. The optimization process comprises two key techniques, generation of application-specific complex instructions (ASCI) and the low-power-oriented microcode-ROM compilation, which independently operate at two different levels of optimization. As a means of architectural level of optimization, application-specific complex instructions are generated so to reduce the activities of fetch and decode units, and as a means of the physical level of optimization, microcode-ROM is compiled with the reduced bitline toggling. Second, we propose a scheme for reducing the power consumption of memory components by coding memory contents. It selectively takes inversion for stored data to reduce the number of bit accesses that have different values from the precharging value, which reduces the bitline toggling and ultimately contributes to the power reduction of memory. Three practical implementations of the proposed method, i.e., conforming (plane, vertical-, and horizontal-strip) inversion schemes are discussed. The vertical- and the horizontal-strip inversio...
Advisors
Kyung, Chong-Minresearcher경종민researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2001
Identifier
165839/325007 / 000965346
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2001, [ xiii, 121 p. ]

Keywords

Processor; Memory; SoC; Low-Power; I/O; I/O; 프로세서; 메모리; SoC; 저전력

URI
http://hdl.handle.net/10203/35921
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=165839&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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