(A) wide dynamic range CMOS image sensor with in-pixel analog memory for pixel level integration time control픽셀별 광 누적 시간 조절기법을 위한 픽셀 아날로그 메모리를 내장한 넓은 다이내믹 레인지 씨모스 이미지 센서

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In this thesis, a wide dynamic range CMOS Image Sensor (CIS) with in-pixel floating-node analog memory for pixel level integration time control is proposed. In the proposed sensor, each pixel employs different integration time based upon the amount of its previous frame illumination level. This enables each pixel to use its own well capacity efficiently, thereby resulting in a CIS with not only wide dynamic range but also high Signal-to-Noise Ratio (SNR). The proposed sensor architecture can be implemented without any significant additional hardware because we use a floating-node parasitic capacitor as an analog memory. It also eliminates random reset noise because true correlated double sampling (CDS) technique can be applied in the proposed operation method. Moreover, modified shared pixel structure has been developed to realize small size pixel for high resolution sensor. A test chip showing the feasibility of the proposed sensor has been designed and fabricated in 0.18 um CMOS process. From the measurement results, the proposed sensor could extend the dynamic range by more than 42 dB. The limit of extended dynamic range is coming from the sensor resolution and shared pixel architecture. In principle, if the sensor resolution is higher, wider dynamic range can be achieved. As far as we know, this is the first work on the use of pixel-node parasitic capacitor as an analog memory for the extension of dynamic range. We believe that the proposed sensor can be applied to various applications successfully because it enlarges the dynamic range efficiently without significant additional hardware and sacrificing any other CIS characteristics unlike the previous works. Moreover, the usage of a floating-node parasitic capacitor as an analog memory can be used effectively in the functional sensor such as motion and multi-resolution sensor As such, it is expected that a floating-node parasitic capacitor as an analog memory could find a variety of new imaging ap...
Advisors
Kim, Choong-Ki김충기
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2006
Identifier
258139/325007  / 020015298
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2006.2, [ ii, 98 p. ]

Keywords

CMOS Image Sensor; Wide Dynamic Range; 넓은 밝기 영역; 씨모스 이미지 센서

URI
http://hdl.handle.net/10203/35360
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=258139&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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