(An) efficient exploration methodology for a platform-based ASIP design플랫폼 기반의 ASIP 설계를 위한 효율적인 탐색 방법

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Embedded systems market is rapidly growing due to the increasing need for product personalization, rapid growth of non-computing domains such as medical instrumentation and imaging, information appliances. An Application specific instruction-set processor (ASIP) can be a significant component of such embedded systems, since the processor customization to target applications yields lower area, power and cost. However, an embedded system employing an ASIP may result in delayed time to market. It results from the higher HW/SW development overhead in designing an instruction set and special hardware modules, in developing a compiler, a debugger, and so on. Therefore, a framework for rapid development of ASIP is crucial for embedded systems. A recent innovation addressing this problem is an embedded soft core, a configurable processor which has parameterizable components. Although these processors can be considered to be flexible compared to the fixed one, they still do not seem to provide much freedom to the designer in choosing architectural alternatives. A more flexible approach to these would be an ASIP platform based on Architecture Description Language. With an ADL-based approach, one can freely form a design space wherein an instruction set, an addressing mode, a pipeline structure with special functional units extracted from target application analysis, to mention a few, can be configured to evaluate performance metrics. This thesis follows an ADL-based approach by defining an architecture description language that directly supports a design space exploration. The design space specified by this language is internally managed by a data structure with formal semantics. To reduce the S/W development overhead caused by architectural changes during the exploration, a package of associated retargetable simulator, compiler and linker has also been developed. As the most essential part of this thesis, a parametric design space exploration algorithm is proposed which...
Advisors
Kim, Tag-Gonresearcher김탁곤researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2004
Identifier
237630/325007  / 000965075
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2004.2, [ ix, 84 p. ]

Keywords

PARAMETERIZED ASIP DESIGN; PLATFORM-BASED DESIGN; DESIGN SPACE EXPLORATION; OPTIMIZATION; 최적화; 파라미터 기반의 ASIP 설계; 플랫폼 기반의 설계; 디자인 공간 탐색

URI
http://hdl.handle.net/10203/35200
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=237630&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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