CAWBT: NVM-Based B+ Tree Index Structure Using Cache Line Sized Atomic Write

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dc.contributor.authorLee, Dokeunko
dc.contributor.authorLee, Seongjinko
dc.contributor.authorWon, Youjipko
dc.date.accessioned2019-12-17T09:20:14Z-
dc.date.available2019-12-17T09:20:14Z-
dc.date.created2019-12-17-
dc.date.created2019-12-17-
dc.date.created2019-12-17-
dc.date.created2019-12-17-
dc.date.issued2019-12-
dc.identifier.citationIEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E102D, no.12, pp.2441 - 2450-
dc.identifier.issn1745-1361-
dc.identifier.urihttp://hdl.handle.net/10203/269809-
dc.description.abstractIndexing is one of the fields where the non-volatile memory (NVM) has the advantages of byte-addressable characteristics and fast read/write speed. The existing index structures for NVM have been developed based on the fact that the size of cache line and the atomicity guarantee unit of NVM are different and they tried to overcome the weakness of consistency from the difference. To overcome the weakness, an expensive flush operation is required which results in a lower performance than a basic B+tree index. Recent studies have shown that the I/O units of the NVM can be matched with the atomicity guarantee units under limited circumstances. In this paper, we propose a Cache line sized Atomic Write B+tree (CAWBT), which is a minimal B+tree structure that shows higher performance than a basic b+ tree and designed for NVM. CAWBT has almost same performance compared to basic B+tree without consistency guarantee and shows remarkable performance improvement compared to other B+tree indexes for NVM.-
dc.languageEnglish-
dc.publisherIEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG-
dc.titleCAWBT: NVM-Based B+ Tree Index Structure Using Cache Line Sized Atomic Write-
dc.typeArticle-
dc.identifier.wosid000499697000018-
dc.identifier.scopusid2-s2.0-85076417736-
dc.type.rimsART-
dc.citation.volumeE102D-
dc.citation.issue12-
dc.citation.beginningpage2441-
dc.citation.endingpage2450-
dc.citation.publicationnameIEICE TRANSACTIONS ON INFORMATION AND SYSTEMS-
dc.identifier.doi10.1587/transinf.2019EDP7034-
dc.contributor.localauthorWon, Youjip-
dc.contributor.nonIdAuthorLee, Dokeun-
dc.contributor.nonIdAuthorLee, Seongjin-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthornon-volatile memory-
dc.subject.keywordAuthorkey-value store-
dc.subject.keywordAuthorindex structure-
dc.subject.keywordAuthorB plus tree-
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