Vertical-Tunnel Field-Effect Transistor Based on a Silicon–MoS2 Three-Dimensional–Two-Dimensional Heterostructure

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dc.contributor.authorShin, Gwang Hyukko
dc.contributor.authorKoo, Bondaeko
dc.contributor.authorPark, Haminko
dc.contributor.authorWoo, Youngjunko
dc.contributor.authorLee, Jae Eunko
dc.contributor.authorChoi, Sung-Yoolko
dc.date.accessioned2018-12-20T08:04:59Z-
dc.date.available2018-12-20T08:04:59Z-
dc.date.created2018-10-26-
dc.date.created2018-10-26-
dc.date.created2018-10-26-
dc.date.created2018-10-26-
dc.date.issued2018-11-
dc.identifier.citationACS APPLIED MATERIALS & INTERFACES, v.10, no.46, pp.40212 - 40218-
dc.identifier.issn1944-8244-
dc.identifier.urihttp://hdl.handle.net/10203/248746-
dc.description.abstractWe present a tunneling field-effect transistor based on a vertical heterostructure of highly p-doped silicon and n-type MoS2. The resulting p-n heterojunction shows a staggered band alignment in which the quantum mechanical band-to-band tunneling probability is enhanced. The device functions in both tunneling transistor and conventional transistor modes, depending on whether the p-n junction is forward or reverse biased, and exhibits a minimum subthreshold swing of 15 mV/dec, an average of 77 mV/dec for four decades of the drain current, a high on/off current ratio of approximately 107 at a drain voltage of 1 V, and fully suppressed ambipolar behavior. Furthermore, low-temperature electrical measurements demonstrated that both trap-assisted and band-to-band tunneling contribute to the drain current. The presence of traps was attributed to defects within the interfacial oxide between silicon and MoS2. © 2018 American Chemical Society.-
dc.languageEnglish-
dc.publisherAMER CHEMICAL SOC-
dc.titleVertical-Tunnel Field-Effect Transistor Based on a Silicon–MoS2 Three-Dimensional–Two-Dimensional Heterostructure-
dc.typeArticle-
dc.identifier.wosid000451496000088-
dc.identifier.scopusid2-s2.0-85056520141-
dc.type.rimsART-
dc.citation.volume10-
dc.citation.issue46-
dc.citation.beginningpage40212-
dc.citation.endingpage40218-
dc.citation.publicationnameACS APPLIED MATERIALS & INTERFACES-
dc.identifier.doi10.1021/acsami.8b11396-
dc.contributor.localauthorChoi, Sung-Yool-
dc.contributor.nonIdAuthorKoo, Bondae-
dc.contributor.nonIdAuthorWoo, Youngjun-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthortunneling transistor-
dc.subject.keywordAuthorheterostructure-
dc.subject.keywordAuthorMoS2-
dc.subject.keywordAuthorsilicon-
dc.subject.keywordAuthorsteep-slope device-
dc.subject.keywordPlusHIGH-MOBILITY-
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