Method for Constructing a Parity Check Matrix of a Low Density Parity Check Code저밀도 패리티 검사 부호의 패리티 검사 행렬 설계 방법
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Park, Hyun-Cheol | ko |
| dc.contributor.author | Kim, Dong-Ho | ko |
| dc.contributor.author | Kim, Nam-Shik | ko |
| dc.contributor.author | Lee, Ye-Hoon | ko |
| dc.contributor.author | You, Cheol-Woo | ko |
| dc.date.accessioned | 2017-12-20T01:13:43Z | - |
| dc.date.available | 2017-12-20T01:13:43Z | - |
| dc.date.issued | 2009-12-16 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/229330 | - |
| dc.description.abstract | A method for generating a parity check matrix of a Low Density Parity Check (LDPC) code. A base matrix is generated in which elements with a value of 1 are arranged at predefined distances. The elements with the value of 1 in the base matrix are replaced with predefined sub-matrices. The method can improve the performance of the LDPC code by implementing the parity check matrix in which the number of 4-cycles or 6-cycles adversely affecting the LDPC code performance is minimized. | - |
| dc.title | Method for Constructing a Parity Check Matrix of a Low Density Parity Check Code | - |
| dc.title.alternative | 저밀도 패리티 검사 부호의 패리티 검사 행렬 설계 방법 | - |
| dc.type | Patent | - |
| dc.type.rims | PAT | - |
| dc.contributor.localauthor | Park, Hyun-Cheol | - |
| dc.contributor.nonIdAuthor | Kim, Dong-Ho | - |
| dc.contributor.nonIdAuthor | Lee, Ye-Hoon | - |
| dc.contributor.nonIdAuthor | You, Cheol-Woo | - |
| dc.contributor.assignee | 삼성전자, KAIST | - |
| dc.identifier.iprsType | 특허 | - |
| dc.identifier.patentApplicationNumber | 2006-021762 | - |
| dc.identifier.patentRegistrationNumber | 1775839 | - |
| dc.date.application | 2006-10-17 | - |
| dc.date.registration | 2009-12-16 | - |
| dc.publisher.country | EI | - |
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