An HLA-Based Distributed Cosimulation Framework in Mixed-Signal System-on-Chip Design

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dc.contributor.authorSeok, Moon Giko
dc.contributor.authorKim, Tag-Gonko
dc.contributor.authorChoi, Chang Beomko
dc.contributor.authorPark, Dae Jinko
dc.date.accessioned2017-03-30T09:20:51Z-
dc.date.available2017-03-30T09:20:51Z-
dc.date.created2016-11-17-
dc.date.created2016-11-17-
dc.date.issued2017-02-
dc.identifier.citationIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.25, no.2, pp.760 - 764-
dc.identifier.issn1063-8210-
dc.identifier.urihttp://hdl.handle.net/10203/222757-
dc.description.abstractIn mixed-signal system-on-chip (SoC) design, distributed cosimulation is one of the practical approaches for unifying various abstracted hardware models using different description languages. Conventional ad hoc distributed cosimulation solutions do not have formal theoretical backgrounds of simulator integration into their solutions. In this brief, we propose a general cosimulation framework based on the high-level architecture (HLA) and newly defined programming language interface for interoperation (PLI-I) as a formal simulator interface. Based on the PLI-I and HLA, we propose formal integration and interoperation procedures. To reduce integration costs, the procedures have been developed into a common library and then merged with modeldependent signal-event converter to handle differently abstracted in/out signals. During the interoperation, to resolve the different time-advance mechanisms of the digital and analog simulators, the adapter executes an advanced HLA-based synchronization based on the presimulation concepts. The case study shows the reduced design effort in integrating and validating the heterogeneous models and simulators using the proposed framework in mixed-signal SoC design.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleAn HLA-Based Distributed Cosimulation Framework in Mixed-Signal System-on-Chip Design-
dc.typeArticle-
dc.identifier.wosid000394593300032-
dc.identifier.scopusid2-s2.0-84981727326-
dc.type.rimsART-
dc.citation.volume25-
dc.citation.issue2-
dc.citation.beginningpage760-
dc.citation.endingpage764-
dc.citation.publicationnameIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS-
dc.identifier.doi10.1109/TVLSI.2016.2594948-
dc.contributor.localauthorKim, Tag-Gon-
dc.contributor.nonIdAuthorChoi, Chang Beom-
dc.contributor.nonIdAuthorPark, Dae Jin-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorHigh-level architecture (HLA)/runtime infrastructure (RTI)-
dc.subject.keywordAuthormixed-signal design-
dc.subject.keywordAuthorsimulator interoperation-
dc.subject.keywordAuthorsystem-level verification-
dc.subject.keywordAuthorsystem-on-chip (SoC) design-
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