High efficiency capacitor-less parallel combined envelope modulator with dual Class D amplifiers for LTE PA

Abstract

A newly proposed envelope modulator (EM) which has three outstanding features is presented to increase the efficiency of an RF power amplifier. There are three bottlenecks to design the EM. One is the boosting capability which drives the voltage larger than the battery voltage. Another is a wide bandwidth property that can follow a high frequency envelope signal. The other is that the EM should have a high efficiency property while satisfies the above properties. In order to supply an output voltage higher than the input voltage while providing low-frequency power in the EM, a low frequency converter (LFC) is designed as a single-inductor dual-output (SIDO) converter. Thanks to the SIDO converter, the EM does not require an additional boost converter. In addition, a high-frequency converter (HFC) with a wide bandwidth capability is also proposed. The proposed compensation method is called as an average current assisted (ACA) compensation method. These two converters, the SIDO converter and the HFC, are combined in parallel without an AC coupling capacitor by employing a low- frequency current balancing (LFCB) technique. The chip is imple-mented in a 0.18μm CMOS process and achieves 86.5% peak efficiency while tracking a 10MHz Long Term Evolution (LTE) envelope signal.