Graphene field effect transistor fabrication using block copolymer self assembly

Abstract

Graphene offers great promise to complement the inherent limitations of silicon electronics. As a first step forward to digital logic devices, band gap opening by graphene nanopattering and complementary doping technology provide full swing graphene inverter hiring low off current. Besides, directed self-assembly of block copolymer lithography has proven itself as a cost-effective , parallel, and scalable nanolithography for the densely packed periodic arrays of nanoscale features, whose typical dimension scale in 5 ~ 50 nm is beyond the resolution limit of conventional photolithography. Herein, we investigated several approach to integrate graphene field effect transistor using directed self-assembly of block copolymer lithography. Multi-channel PDMS/GNR FET and monolithic GNR FET were fabricated by enhanced blockcopolymer softgrapoepitaxy techniques. . In this work, we adopted $OmniCoat^{TM}$ coating and Remover $PG^{TM}$ protocol for SU8 comfinement removal, and residual resist was successfully removed upon monolithic GNR FET. Moreover, we neutrally treated for SU8 confinement vertical surface with polymer bursh, thus blockcopolymer is perpendiculary allinged across the both side confimenment. Compare with last grapepitaxy technique, enhanced process enables to skip hydrophilic treatment of bottom surface to be alligned. Also we implemented mussel-inspired polydopamine adhesive in con-junction with graphoepitaxy principle to tailor graphene nanoribbon array and graphene nanomesh located between metal electrodes. Polydopamine adhesive was utilized for facile and damage-free surface treatment to complement the low surface energy of pristine graphene. Our process minimizes the damage of ideal graphitic structures and electrical properties of graphene during nanopatterning process. Multi-channel graphene nanorib-bon arrays and graphene nanomesh are successfully fabricated between metal electrodes. To date, considerable research efforts have been devoted to complementary p- and n-type doping of graphene as a fundamental requirement for graphene based electronics. Unfortunately, previous efforts suffer from undesired defect formation, poor controllability of doping level, and subtle environmental sensitivity. Here we present that graphene can be complementary p- and n-doped by simple polymer coating with different dipolar characteristics. Significantly, spontaneous vertical ordering of dipolar pyridine side groups of poly-4-vinylpyridine at graphene surface can stabilize n-type doping at room temperature ambient condition. The dipolar field also enhances and balances the charge mobility by screening the impurity charge effect from bottom substrate. We successfully demonstrate ambient stable inverters by integrating p- and n-type graphene transistors, which demonstrated clear voltage inversion and high gain ($\mid A \mid$) of 0.17 at a 3.3 V input voltage. This straightforward polymer doping offers diverse opportunities for graphene based electronics, including logic circuits. Additionally, graphene nano mesh FETs toward complementary graphene inverter was successfully fabricated. However, dirac point shift during etch process inhibits typicall inverter performance. After limitation of band gap opening using etch process is overcome by future graphene study, our area-selective polymer doping in conjunction with blockcopolymer nanolithography can accomplish ambient stable graphene inverter that minimize power consumtion.