Bistable memory and logic-gate devices fabricated by intercrossed stacking of graphene-ferroelectric hybrid ribbons

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dc.contributor.authorKim, Woo-Youngko
dc.contributor.authorKim, Hyeon-Donko
dc.contributor.authorJeon, Gwang-Jaeko
dc.contributor.authorKang, In-Kuko
dc.contributor.authorShim, Hyun Binko
dc.contributor.authorKim, Tae-Hyoko
dc.contributor.authorLee, Hee Chulko
dc.date.accessioned2016-09-07T04:23:38Z-
dc.date.available2016-09-07T04:23:38Z-
dc.date.created2016-08-29-
dc.date.created2016-08-29-
dc.date.issued2016-07-
dc.identifier.citationMICRO & NANO LETTERS, v.11, no.7, pp.356 - 359-
dc.identifier.issn1750-0443-
dc.identifier.urihttp://hdl.handle.net/10203/212876-
dc.description.abstractA ferroelectric-gated graphene field-effect transistor was fabricated by consecutively stacking two distinct graphene-ferroelectric hybrid ribbons at right angles. Two graphene layers play different roles. One graphene layer acts as a gate electrode and the other graphene layer acts as a channel between two electrodes, source and drain. Electric gating at the gate graphene modulates the resistance of the channel graphene. By means of ferroelectric polarisation, bistable resistance states of the channel graphene could be recorded, and the retention time of bistability was estimated to be 460 days by extrapolating of two resistance values in time-resistance relationships. Furthermore, the underlying concept to fabricate bistable memory device was extended to the methodology to realise a logic-gate device by stacking three distinct graphene-ferroelectric hybrid ribbons-
dc.languageEnglish-
dc.publisherINST ENGINEERING TECHNOLOGY-IET-
dc.titleBistable memory and logic-gate devices fabricated by intercrossed stacking of graphene-ferroelectric hybrid ribbons-
dc.typeArticle-
dc.identifier.wosid000380259600004-
dc.identifier.scopusid2-s2.0-84978120474-
dc.type.rimsART-
dc.citation.volume11-
dc.citation.issue7-
dc.citation.beginningpage356-
dc.citation.endingpage359-
dc.citation.publicationnameMICRO & NANO LETTERS-
dc.identifier.doi10.1049/mnl.2016.0025-
dc.contributor.localauthorLee, Hee Chul-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorgraphene devices-
dc.subject.keywordAuthornanoribbons-
dc.subject.keywordAuthornanofabrication-
dc.subject.keywordAuthorlogic gates-
dc.subject.keywordAuthorferroelectric devices-
dc.subject.keywordAuthorfield effect transistors-
dc.subject.keywordAuthorspin coating-
dc.subject.keywordAuthorferroelectric thin films-
dc.subject.keywordAuthorsemiconductor storage-
dc.subject.keywordAuthorbistable memory device-
dc.subject.keywordAuthorlogic gate device-
dc.subject.keywordAuthorintercrossed stacking-
dc.subject.keywordAuthorgraphene-ferroelectric hybrid ribbons-
dc.subject.keywordAuthorferroelectric gated graphene field effect transistor-
dc.subject.keywordAuthorgate electrode-
dc.subject.keywordAuthorferroelectric polarisation-
dc.subject.keywordAuthorC-
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