Recently, there has been a strong demand for high speed data applications in wireless communications. This has led to the improvements and innovations in the high quality and large capacity data communications over the wireless networks. Recent studies [1, 2] have shown that the long term evolution (LTE) technology is a potential candidate to meet the specified requirements in the 3rd generation partnership project (3GPP). The 3GPP may be thought of as an integrated concept of the 2G and 3G technologies in cellular standards. The LTE utilizes the frequency span of 0.7GHz to 2.7GHz to support supports flexible data rates with channel bandwidth varied from 1.4 MHz to 20 MHz. Designing the receivers for the LTE applications can be an issue of great challenge.
In this dissertation, design techniques for high performance CMOS-based low noise amplifier (LNA) and Active Mixer which features wide-band, low power consumption, low voltage operation, process/temperature independent, and small chip area are presented. Firstly, a modified capacitor cross-coupled (CCC) common-gate (CG) LNA is presented. By increasing drain-source conductance and using inter-stage inductors with, PMOS current bleeding technique, being able to simultaneously realize both the better input matching and the more noise cancellation. Moreover, the adopted inter-stage inductors can contribute to extend the bandwidth of the LNA by compensating the effect of the parasitic capacitances through resonance. LNA was designed in 0.18 um CMOS TSMC and supply voltage is 1.8V. Secondly, a broadband low-noise, high-linear mixer is presented. The mixer follows the Gilbert cell topology with some modification. A current-bleeding circuit applied in different way than conventional one. The gates of the PMOS transistors are coupled to the opposite side RF input, it work as noise and third-order distortion cancellation. As result, the high performance achieved by improvement of overall noise figure and increasing l...