Ultra-thin High-K Dielectrics for memory and logic device applications = 메모리 및 로직 소자용 고유전체 박막에 관한 연구

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This dissertation focuses on the development of ultra-thin high-K dielectrics for DRAM capacitors and for high performance logic transistors which are established on germanium substrate. For the development of DRAM capacitor dielectric, metal-insulator-metal (MIM) HfLaO, ZrO2, and HfLaO embedded ZrO2 capacitors were investigated. Although single HfLaO and ZrO2 capacitor could not satisfy the performance criterion (6 A of EOT and 150 nA/cm2 of a leakage current density), optimized HfLaO embedded ZrO2 shows an EOT of 6.08 A and a leakage current density of 90 nA/cm2 at VG=+1 V. Furthermore, it is founded that hole injection is the determining factor of the leakage current in the ZrO2-HfLaO stack, thus HfLaO should be kept away from the electrode interface due to its smaller valance band offset than that of ZrO2. For the development of gate dielectric on germanium substrate, trimethylaluminum pretreatment prior to HfO2 is introduced for native Ge oxide reduction. It is identified that trimethylaluminum pretreatment could effectively turn native Ge oxide into an aluminum oxide incorporated interfacial layer which suppresses Ge diffusion into HfO2 reducing hysteresis in the capacitance-voltage curve. Moreover, the device reliability of the trimethylaluminum pretreated sample is improved from a constant current stress test. Therefore trimethylaluminum pretreatment is an effective in-situ method for the gate dielectric stack formation to reduce charge trapping in the HfO2 film on a Ge substrate. In order to suppress native Ge oxide completely, high vacuum anneal technique is employed. It is confirmed that annealing in high vacuum environment can remove native Ge oxide and 1 nm of Al capping layer can block the oxygen penetration after air exposure. On the other hand, 3 nm of Hf capping layer is unable to block an oxygen penetration after air exposure. Comparing Jg @ VFB+1V vs. EOT with other groups, this methodology has an advantage of both leakage current and hyster...
Cho, Byung-Jinresearcher조병진
한국과학기술원 : 전기및전자공학과,
Issue Date
568563/325007  / 020075294

학위논문(박사) - 한국과학기술원 : 전기및전자공학과, 2014.2, [ iv, 88 p. ]


high-K dielectrics; 고진공 열처리; EOT; 누설전류밀도; 원자층증착법; 고유전체; ALD; leakage current density; EOT; high vacuum anneal

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