Analytical method for the layout design of a semiconductor fab to maximize its operational efficiency

Abstract

Semiconductor has a very complicated manufacturing process that it goes through hundreds of processing steps repetitively. Considering this characteristic, the FAB layout design, mainly the decision on where to assign which clusters, is a very important issue because it greatly affects the operational efficiency of the FAB. Usually, layout design and cluster (or tool) planning must be done frequently based on the production plan. Therefore, finding an optimal layout design and cluster plan in right time is a key issue in the FAB operation. Nevertheless, in real practice the layout design process is performed through the trial & error method with simulation, which takes too much time, and even the final design is not guaranteed for its optimality for maximizing the operational efficiency. To solve this problem, an analytic approach for layout design process is studied. Another problem is that the current layout design process does not count the cluster configuration issue importantly. Considering the processing step sequences, how to group the tools to form a cluster greatly affects the performance of the layout design. To solve this problem, actual processing step data is used to discuss the cluster configuration issue in layout design process. As a result, this research will provide a guideline and methodology for the FAB layout design. Also, a new concept of layout design is introduced to provide some intuitions on the structural characteristics of the FAB layout.