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A low-noise folded bit-line sensing architecture for multigigabit DRAM with ultrahigh-density 6F(2) cell Kim, JS; Choi, YS; Yoo, Hoi-Jun; Seo, KS, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.33, no.7, pp.1096 - 1102, 1998-07 |
Adaptive bit-reduced mean absolute difference criterion for block-matching algorithm and its VLSI design Oh, HS; Baek, Y; Lee, Heung-Kyu, OPTICAL ENGINEERING, v.37, no.12, pp.3272 - 3281, 1998-12 |
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