Showing results 1 to 4 of 4
A Vertically Integrated Junctionless Nanowire Transistor Lee, Byung-Hyun; Hur, Jae; Kang, Min-Ho; Bang, Tewook; Ahn, Dae-Chul; Lee, Dongil; Kim, Kwang-Hee; et al, NANO LETTERS, v.16, no.3, pp.1840 - 1847, 2016-03 |
Nonvolatile Memory by All-Around-Gate Junctionless Transistor Composed of Silicon Nanowire on Bulk Substrate Choi, Sung-Jin; Moon, Dong-Il; Kim, Sung-Ho; Ahn, Jae-Hyuk; Lee, Jin-Seong; Kim, Jee-Yeon; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.32, no.5, pp.602 - 604, 2011-05 |
Sensitivity of Threshold Voltage to Nanowire Width Variation in Junctionless Transistors Choi, Sung-Jin; Moon, Dong-Il; Kim, Sung-Ho; Duarte, Juan P.; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.32, no.2, pp.125 - 127, 2011-02 |
멀티게이트 트랜지스터의 콤팩트 모델링 및 특성 연구 = Research on the compact modeling for multi-gate transistors and its characteristiclink 황병운; Hwang, Byeong-Woon; et al, 한국과학기술원, 2012 |
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