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An 8-Bit 1-GS/s Asynchronous Loop-Unrolled SAR-Flash ADC With Complementary Dynamic Amplifiers in 28-nm CMOS Oh, Dong-Ryeol; Moon, Kyoung-Jun; Lim, Won-Mook; Kim, Ye-Dam; An, Eun-Ji; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.4, pp.1216 - 1226, 2021-04 |
Flash-assisted time-interleaved (FATI) successive approximation (SA) architecture for low power, high speed A/D conversion = 고속 저전력 아날로그-디지털 변환을 위한 플래시 보조 시분할 연속 근사 구조link Sung, Ba-Ro-Saim; 성바로샘; et al, 한국과학기술원, 2016 |
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