1 | A 14.2 mW 2.55-to-3 GHz Cascaded PLL With Reference Injection and 800 MHz Delta-Sigma Modulator in 0.13 mu m CMOS Park, Dong-Min; Cho, Seong-Hwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.47, no.12, pp.2989 - 2998, 2012-12 |
2 | A 6.5-GHz energy-efficient BFSK modulator for wireless sensor applications Cho, SeongHwan; Chadrakasan, AP, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.39, no.5, pp.731 - 739, 2004-05 |
3 | A CMOS frequency synthesizer block for MB-OFDM UWB systems Kim, CW; Choi, SS; Lee, Sang-Gug, ETRI JOURNAL, v.29, pp.437 - 444, 2007-08 |
4 | A fully integrated low-noise 1-GHz frequency synthesizer design for mobile communication application Lee, SJ; Kim, B; Lee, Kwyro, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.32, no.5, pp.760 - 765, 1997-05 |
5 | A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration Yoon, Heein; Park, Suneui; Choi, Jaehyouk, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.6, pp.1564 - 1574, 2019-06 |
6 | A Low-Noise, 900-MHz VCO in 0.6-m CMOS chan-hong park; Kim, Beom-Sup, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.34, no.5, pp.586 - 591, 1999-05 |
7 | A quadrature modulation transmitter using two frequency synthesizers Lee, Jae-Won; Cho, Seong-Hwan, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.54, pp.907 - 911, 2007-10 |
8 | (A) 4.9mW 270MHz CMOS frequency synthesizer/direct FSK modulator = 4.9mW 270MHz 대역의 CMOS 주파수 합성기/직접 FSK 변조기의 설계link Choi, Hyok-Jae; 최혁재; et al, 한국과학기술원, 2003 |
9 | (A) quadrature modulation transmitter using two frequency synthesizers = 두 개의 주파수 합성기를 사용한 직교 변조 송신기link Lee, Jae-Won; 이재원; et al, 한국과학기술원, 2007 |
10 | An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators Kim, Juyeop; Lim, Younghyun; Yoon, Heein; Lee, Yongsun; Park, Hangi; Cho, Yoonseo; Seong, Taeho; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.12, pp.3466 - 3477, 2019-12 |
11 | CMOS Fractional-N Frequency Synthesizer for UHF RFID Reader Applications With Transformer-Based ISF Manipulation VCO Jung, Hyunki; Choi, Kyung-Sik; Kim, Keun-Mok; Jo, Daehoon; Lee, Jaeheon; Kim, Jusung; Ko, Jinho; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.10, pp.4083 - 4087, 2022-10 |
12 | Design and implementation of low phase noise VCO for power aware frequency synthesizer = 전력 소비 적응형 주파수 합성기에 적합한 저잡음 전압 제어 발진기의 설계와 구현link Ku, Yeon-Woo; 구연우; et al, 한국과학기술원, 2008 |
13 | Energy-efficient CMOS frequency synthesizer architecture for low-power narrow-band wireless communication systems = 저전력 협대역 무선통신 시스템을 위한 고에너지 효율의 CMOS 주파수 합성기 구조link Shin, Sang-ho; 신상호; et al, 한국과학기술원, 2007 |
14 | Fast-frequency offset cancellation loop using low-IF receiver and fractional-N PLL Shin, S; Kim, K; Lee, Kwyro; Kang, SM, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.54, pp.272 - 276, 2007-03 |
15 | Low-Phase-Noise 20-GHz Phase-Locked Loop Using Harmonic-Tuned VCO Assisting With g(m) -Boosting Technique Lee, Hee Sung; Jang, Tae Hwan; Kim, Joon Hyung; Park, Chul Soon, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.31, no.10, pp.1629 - 1633, 2023-10 |
16 | Reference multiplied PLL and phase filtered harmonic locking for low noise frequency synthesizer = 저잡음 주파수 합성기를 위한 기준 주파수 증폭된 위상 고정 루프와 위상 필터된 조화 고정link Lee, Woo-Jae; 이우재; et al, 한국과학기술원, 2009 |