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Border-trap characterization in high-kappa strained-si MOSFETs Maji, Debabrata; Duttagupta, S. P.; Rao, V. Rarngopal; Yeo, Chia Ching; Cho, Byung Jin, IEEE ELECTRON DEVICE LETTERS, v.28, no.8, pp.731 - 733, 2007-08 |
Strained-SiGe complementary MOSFETs adopting different thicknesses of silicon cap layers for low power and high performance applications Mheen, B; Song, YJ; Kang, JY; Hong, Songcheol, ETRI JOURNAL, v.27, no.4, pp.439 - 445, 2005-08 |
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