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Showing results 1 to 3 of 3

1
A 5.4/2.7/1.62-Gb/s Receiver for DisplayPort Version 1.2 With Multi-Rate Operation Scheme

Lee, Won-Young; Hwang, Kyu-Dong; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.59, no.12, pp.2858 - 2866, 2012-12

2
A DC-to-12.5 Gb/s 9.76 mW/Gb/s All-Rate CDR With a Single LC VCO in 90 nm CMOS

Yoon, Jonghyeok; Kwon, Soon Won; Bae, Hyeon-Min, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.52, no.3, pp.856 - 866, 2017-03

3
A Power-and-Area Efficient 10 x 10 Gb/s Bootstrap Transceiver in 40 nm CMOS for Referenceless and Lane-Independent Operation

Lee, Joon Yeong; Han, Kwangseok; Yoon, Taehun; Kim, Taeho; Lee, Sang-Eun; Lee, Jeong-Sup; Park, Jinho; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.51, no.10, pp.2475 - 2484, 2016-10

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